Senior RTL Design Lead

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๐Ÿ“ Bangalore, India

About this role

Job Summary

JD1 : SoC Pre-Silicon Verification & Emulation Engineer (Debug Fabrics and Global Flows)Location:ย Bangalore
Number of Positions: 10-14Job SummaryWe are seeking experienced SoC Verification and Emulation Engineers to support server platform verification activities. The candidate will be responsible for developing and executing verification plans, debugging complex SoC issues, and driving verification closure in pre-silicon and emulation environments.The role requires strong expertise in SystemVerilog/UVM-based verification methodologies, Python-based automation, and functional validation of critical infrastructure features including Security, Reset, RAS, Clocking, Power Management, GPIO, Debug and Fuse flows.

Key Responsibilities

Strong expertise in SoC Pre-Silicon Verification and Emulation using SystemVerilog, UVM, Assertions (SVA), Functional Coverage, and Testbench Development.Hands-on experience in developing verification environments, checkers, scoreboards, test cases, and regression execution frameworks.Proven experience in verifying Debug Fabrics, including VISA, Trace, Observability, Trigger, and TAP/JTAG-based validation.Experience in validating SoC Platform Infrastructure and System Control Flows, including Reset, Security, RAS, Fuse, GPIO, Clocking, and Power Management.Strong proficiency in Python scripting and automation for pre-silicon and emulation-based test execution.Hands-on experience with SoC emulation platforms, including test execution, debug, regression management, and coverage closure.Expertise in verification debug tools, waveform analysis, failure triage, and root-cause analysis of complex SoC issues.Ability to analyze and resolve SoC integration and functional validation issues in collaboration with architecture, design, and firmware teams.Good understanding of Intel Xeon/Client verification methodologies and validation flows.Strong analytical, communication, and problem-solving skills with the ability to work effectively in cross-functional global teams.R

Skill Requirements

Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, Computer Science, or a related field.3 to 12 years of experience in SoC Verification, Pre-Silicon Validation and Emulation.

Other Requirements

Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, Computer Science, or a related field.3 to 12 years of experience in SoC Verification, Pre-Silicon Validation and Emulation.

Frequently Asked Questions

Is the salary disclosed for the Senior RTL Design Lead position at HCLTech?
The salary for this Senior RTL Design Lead role at HCLTech is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Senior RTL Design Lead position at HCLTech located?
This Senior RTL Design Lead role at HCLTech is based in Bangalore, India. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
How do I apply for the Senior RTL Design Lead position at HCLTech?
Click the "Apply Now" button on this page. You will be redirected to HCLTech's official application portal hosted on successfactors where you can submit your application directly.
When was the Senior RTL Design Lead job at HCLTech posted?
This Senior RTL Design Lead position at HCLTech was posted on Sep 15, 2026. Apply as soon as possible โ€” early applications are often reviewed first.
Senior RTL Design Lead
HCLTech
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