Senior RTL Design Lead

Job Summary

Emulation Engineer (ZeBu Modelling)

We are seeking a skilled Emulation Engineer with hands-on experience in Synopsys ZeBu Emulation platforms and model development. The engineer will be responsible for building, integrating, and validating emulation models for complex SoC/IP designs, enabling accelerated pre-silicon validation, software bring-up, and hardware-software co-verification activities

Key Responsibilities

• Develop and maintain ZeBu emulation models for IP, subsystem, and SoC-level designs.
• Convert RTL designs into emulation-ready models and optimize them for ZeBu platforms.
• Perform design partitioning, synthesis, compilation, and capacity analysis for emulation.
• Integrate testbench components, transactors, BFMs, and verification environments into emulation platforms.
• Support hardware-software co-verification and early software bring-up activities.
• Debug build, compilation, synthesis, partitioning, and runtime issues on ZeBu systems.
• Optimize emulation performance, resource utilization, and turnaround time.
• Develop and automate emulation flows using Python, Shell, and Tcl scripting.
• Work closely with DV, RTL, firmware, architecture, and validation teams to enable project execution.
• Analyze logs, waveforms, and debug data to identify and resolve design issues.
• Support regression execution, coverage collection, and emulation sign-off activities.
• Create and maintain technical documentation, guidelines, and best practices related to emulation flows.

Skill Requirements

Required Technical Skills

Emulation

• Hands-on experience with Synopsys ZeBu platforms.
• Good understanding of emulation architecture and flows.
• Experience with emulation build, compilation, and runtime debug.
• Knowledge of hardware-assisted verification methodologies.
• Understanding of ASIC/SoC design and verification flows.
• Knowledge of simulation-to-emulation migration.

• FPGA/Prototyping (Preferred)

  • Experience with FPGA prototyping platforms such as HAPS, VCU, or equivalent.
  • Understanding of synthesis, timing closure, and partitioning concepts.

  • Software & Scripting

    • Python scripting for automation.
    • Shell/TCL scripting for build automation and debug.
    • Linux environment proficiency.

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Other Requirements

Qualifications

• B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, Computer Engineering, or related disciplines.
• 3–10 years of experience in Semiconductor Design Verification, Emulation, or FPGA Prototyping.

Preferred Candidate Profile

• Strong debugging and problem-solving skills.
• Ability to work independently on complex emulation projects.
• Excellent communication and customer interaction skills.
• Quick learner with the ability to adapt to new tools and methodologies.