Planning - PAH
Larsen & Toubro
NoC Design Lead
Larsen & Toubro· Data Centre
About this role
NoC Design Lead (×2 openings)
Location: Bangalore, India | Company: LTSCT — L&T Semiconductor Technologies Limited
Reporting To: Chandra — Senior Architect, DC HW Systems | Experience: 10+ years (mandatory)
Role Summary
We are hiring two NoC Design Leads to own the stacked Network-on-Chip that forms the data backbone of xPU — 4 physical planes delivering 12 TB/s cross-section bandwidth. You will architect and implement coherency, routing, QoS, and bandwidth allocation across the BFOS arrays, banked SRAM, HBM controllers, UCIe links, and the host interface. This role is central to sustaining the extreme bandwidth and latency targets the compute architecture demands.
Key Responsibilities
- Architect and implement the 4-plane stacked NoC delivering 12 TB/s cross-section bandwidth across all on-chip and off-chip endpoints.
- Define topology, routing algorithms, virtual channels, and arbitration to guarantee deadlock-free, high-throughput data movement.
- Design QoS and bandwidth-allocation mechanisms balancing traffic between dual BFOS arrays, 512 SRAM banks, HBM controllers, UCIe, and host.
- Own the on-chip coherency protocol and its interaction with SRAM, HBM, and the host-interface coherency layer.
- Drive micro-architecture, RTL, and integration of routers, network interfaces, buffers, and clock-domain crossings.
- Model and analyze latency, bandwidth, and congestion via cycle-accurate simulation and traffic generators; close performance targets.
- Collaborate with PD on floorplan-aware NoC partitioning across the 4 physical planes and with DFT/verification on coverage.
- Define QoR/performance metrics, mentor engineers, and represent NoC in architecture and integration reviews.
Required Skills & Experience
- 10+ years designing on-chip interconnects/NoCs or coherent fabrics for high-performance SoCs.
- Deep understanding of NoC topologies (mesh, torus, crossbar, stacked/multi-plane), routing, flow control, and QoS.
- Strong grasp of cache-coherency protocols (MESI/MOESI-class, directory-based) and memory-consistency models.
- Expertise in RTL design (SystemVerilog) of routers, arbiters, buffers, and asynchronous/CDC interfaces.
- Hands-on performance modeling and analysis — cycle-accurate simulation, traffic modeling, bandwidth/latency closure.
- Experience with commercial or in-house NoC generators/IP and their integration methodology.
- Familiarity with high-bandwidth memory (HBM) and chiplet interconnect (UCIe) traffic characteristics.
- Proficiency in scripting (Python/Perl) for performance analysis and verification support.
- Strong micro-architecture, specification, and documentation skills.
- Demonstrated technical leadership and cross-team collaboration.
Preferred Qualifications
- Experience with multi-plane or 3D-stacked NoC architectures.
- Background in AI accelerator or GPU dataflow interconnects.
- Familiarity with formal verification of coherency/deadlock properties.
- M.Tech/MS in EE/ECE/CS or equivalent.
Frequently Asked Questions
Is the salary disclosed for the NoC Design Lead position at Larsen & Toubro?
The salary for this NoC Design Lead role at Larsen & Toubro is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the NoC Design Lead position at Larsen & Toubro located?
This NoC Design Lead role at Larsen & Toubro is based in Bengaluru, Karnataka, India. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the NoC Design Lead role at Larsen & Toubro full-time or part-time?
This is listed as a FULL TIME position. It is posted as a NoC Design Lead role in the Data Centre department at Larsen & Toubro.
Which team or department does the NoC Design Lead at Larsen & Toubro belong to?
This NoC Design Lead position is part of the Data Centre department at Larsen & Toubro. See the full job description for more information about the team structure and responsibilities.
How do I apply for the NoC Design Lead position at Larsen & Toubro?
Click the "Apply Now" button on this page. You will be redirected to Larsen & Toubro's official application portal hosted on peoplestrong where you can submit your application directly.
When was the NoC Design Lead job at Larsen & Toubro posted?
This NoC Design Lead position at Larsen & Toubro was posted on Aug 27, 2026. Apply as soon as possible — early applications are often reviewed first.
NoC Design Lead
Larsen & Toubro
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