Process Integration, Yield and Defect Reduction Engineering Lead

intel· 100 Intel Corporation
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📍 US, New Mexico, AlbuquerqueFull time💰 USD 141K–199K

About this role

Job Details:

Job Description: 

The New Mexico Silicon Manufacturing (NM Si Manufacturing) Integration Team is seeking a highly motivated engineering professional with a strong technical background to grow into a Process Integration (PI) Team Lead role. This position reports directly to the NM Si Manufacturing Integration Director and offers the opportunity to lead teams of technical contributors supporting Intel's advanced packaging manufacturing operations.

In this role, you will collaborate closely with Advanced Packaging High-Volume Manufacturing (HVM) engineering and factory operations teams to support the transfer, ramp, and sustainment of advanced packaging technologies. You will play a critical role in ensuring successful execution against foundry customer commitments while driving continuous improvements in yield, quality, reliability, and manufacturing efficiency.

The ideal candidate will have a proven track record of technical leadership, innovation, and cross-functional collaboration. Success in this position requires strong problem-solving skills, the ability to influence across organizations, and a passion for enabling technology development in a high-volume manufacturing environment.

Qualifications:

Minimum Qualifications:

  • Bachelor's or Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Materials Science, Microelectronics Engineering, Chemistry, Physics, or a related technical field.
  • 5+ years of experience in semiconductor manufacturing or advanced packaging.
  • In addition, candidates should possess experience in one or more of the following areas:
    • 5+ years of experience in process integration or defect reduction for backend interconnect or advanced packaging processes.
    • 3+ years of experience applying Design of Experiments (DOE) methodologies.
    • 5+ years of experience in data analysis and statistical process control using tools such as JMP, SQL, PCS, or similar platforms.

Preferred Qualifications:

Technical Skills and Experience

  • Strong understanding of semiconductor manufacturing process flow and advanced packaging technologies.
  • Knowledge of process capability analysis, specification management, statistical variation, and process control methodologies.
  • Proven ability to analyze defectivity and parametric data to identify yield limiters and drive process improvements.
  • Experience with yield analysis and defect reduction methodologies.
  • Experience applying Failure Modes and Effects Analysis (FMEA) techniques.
  • Experience developing inline monitoring systems, dashboards, and manufacturing health metrics.

Leadership and Problem Solving

  • Demonstrated success leading technology development, transfer, and manufacturing ramp activities.
  • Proven ability to solve complex technical challenges using innovative and data-driven approaches.
  • Strong project management, communication, and stakeholder management skills.
  • Ability to lead cross-functional teams and influence technical decisions across multiple organizations.
  • Experience driving operational excellence, yield improvement, and manufacturing efficiency initiatives.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

 

 

Annual Salary Range for jobs which could be performed in the US: $140,830.00-198,820.00 USD

 

 

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

 

 

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Frequently Asked Questions

What is the salary for the Process Integration, Yield and Defect Reduction Engineering Lead role at intel?
The listed salary for this Process Integration, Yield and Defect Reduction Engineering Lead position at intel is USD 141K–199K. This is an Full time role.
Where is the Process Integration, Yield and Defect Reduction Engineering Lead position at intel located?
This Process Integration, Yield and Defect Reduction Engineering Lead role at intel is based in US, New Mexico, Albuquerque. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Process Integration, Yield and Defect Reduction Engineering Lead role at intel full-time or part-time?
This is listed as a Full time position. It is posted as a Process Integration, Yield and Defect Reduction Engineering Lead role in the 100 Intel Corporation department at intel.
Which team or department does the Process Integration, Yield and Defect Reduction Engineering Lead at intel belong to?
This Process Integration, Yield and Defect Reduction Engineering Lead position is part of the 100 Intel Corporation department at intel. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Process Integration, Yield and Defect Reduction Engineering Lead position at intel?
Click the "Apply Now" button on this page. You will be redirected to intel's official application portal hosted on workday where you can submit your application directly.
When was the Process Integration, Yield and Defect Reduction Engineering Lead job at intel posted?
This Process Integration, Yield and Defect Reduction Engineering Lead position at intel was posted on Aug 21, 2026. Apply as soon as possible — early applications are often reviewed first.
Process Integration, Yield and Defect Reduction Engineering Lead
intel · 💰 USD 141K–199K
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