CIASIC Verification Technical Leader || Verilog, System Verilog, Testbench, UVM || Exp - 10+ yearsciscoFull time☆SaveView & Apply→
CILeader, Hardware Engineering - 10+ years of proven experience as Product/Design Engineer with expertise in electronic product design and architecture.ciscoFull time☆SaveView & Apply→
CILeader, Software Engineering | Go/Python/Java, Microservices, CASB Domain | 12+ years,ciscoFull time☆SaveView & Apply→
CISoftware Engineer :: C/C++, Python scripting, L2/L3 Networking (9-12 Years)ciscoFull time☆SaveView & Apply→
CISoftware Engineering Technical Leader - Golang, Docker, AWS | 12+ Yrs | BLRciscoFull time☆SaveView & Apply→
