Sr Principal Engineer -SIPI

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📍 SAN JOSEFull time💰 USD 154K–286K

About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Sr Principal Enginee
This is a unique opportunity to join the HPP IP R&D Group at Cadence Design Systems. We are looking for a Sr Principal SI/PI Engineer who will be a key contributor to our advanced high speed IP products. This is a hands-on technical position.
Main Job Tasks and Responsibilities:
• Work on test chip package design SI/PI optimization and verification.
• Work on evaluation board design optimization for best SI/PI performance.
• Provide extracted and measured channel models for chip designers in the R&D team.
• Help with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.
• Review customer package and board designs and simulation results. Help with providing feedback to customers to ensure best possible performance of our IP in their ASIC.
• Work on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.
• Help with SI/PI related debug of test chips or customer ASICs in the lab.
Position Requirements:
• M.S. or Ph.D. Electrical Engineering (or similar degree)
• 3+ years of experience preferably working with high speed SerDes and PHYs
• Good understanding of high speed SerDes architecture
• Hands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.
• Fluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave
• Experience with IBIS-AMI model simulations
• Experience with simulation result to lab measurement correlation
• Good understanding of PCB and FCBGA design rules and requirements
• Strong debugging and problem-solving skills
• Excellent communication and presentation skills to effectively communicate with both customers and internal stake holders

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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Frequently Asked Questions

What is the salary for the Sr Principal Engineer -SIPI role at cadence?
The listed salary for this Sr Principal Engineer -SIPI position at cadence is USD 154K–286K. This is an Full time role.
Where is the Sr Principal Engineer -SIPI position at cadence located?
This Sr Principal Engineer -SIPI role at cadence is based in SAN JOSE. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Sr Principal Engineer -SIPI role at cadence full-time or part-time?
This is listed as a Full time position. It is posted as a Sr Principal Engineer -SIPI role at cadence.
How do I apply for the Sr Principal Engineer -SIPI position at cadence?
Click the "Apply Now" button on this page. You will be redirected to cadence's official application portal hosted on workday where you can submit your application directly.
When was the Sr Principal Engineer -SIPI job at cadence posted?
This Sr Principal Engineer -SIPI position at cadence was posted on Aug 19, 2026. Apply as soon as possible — early applications are often reviewed first.
Sr Principal Engineer -SIPI
cadence · 💰 USD 154K–286K
Apply for this role ↗

You'll be redirected to cadence's official application page on Workday.