Sr. Physical Design Engineer

lumilens· Engineering
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📍 San JoseFullTime

About this role

ABOUT LUMILENS

At Lumilens we are building the critical photonics infrastructure that powers tomorrow’s AI supercomputing. From chip-to-chip optical interconnects to scalable photonic engines, Lumilens is unlocking a new era of computing faster, cooler, and massively more efficient.

We’re a well-funded startup backed by Mayfield and led by veterans who’ve built

And scaled some of the most transformative technologies in the industry. This isn’t

incremental innovation, it’s a ground-floor opportunity to rethink the optical layer from

the silicon up. You’ll work alongside a team of world-class engineers solving some of

the hardest challenges in optics, systems, and scale. Every line of code, every design

decision, every breakthrough you help deliver will shape the infrastructure of tomorrow.

If you're looking for mission, momentum, and the chance to make an outsized impact

jump on the rocket ship. We’re just getting started.

Role Overview

We are seeking a Senior Physical Design Engineer to join our silicon design team developing high-performance ASIC using TSMC advance process nodes, including 5nm and 3nm. In this role, you will own physical implementation from RTL to GDSII, drive timing and power closure for ultra-high-speed designs, and work closely with RTL, STA, IP, and verification teams to solve complex implementation challenges unique to advanced-node and high-speed transceiver architectures.

Key Responsibilities:

  1. Physical Implementation: Own full-chip and block-level physical implementation, including floorplanning, placement, CTS, routing, and physical verification for high-speed designs in advanced TSMC nodes.

  1. Timing, Power, and Area Closure: Collaborate closely with RTL and STA teams to ensure clean handoffs and convergent timing, area, and power closure across complex design blocks and full chip.

  1. Advanced Physical Design: Apply physical design techniques for multi-voltage and multi-frequency domains, hierarchical implementation, physical-aware synthesis, congestion mitigation, skew optimization, and RC extraction-aware placement and routing.

  1. Signoff and Tape out: Perform tapeout signoff activities, including PV, EM/IR, ESD and ejobview using industry-standard verification tools.

Qualifications:

  1. Education: Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, or a related field.

  1. Experience: 8+ years of hands-on physical design experience, preferably with advanced technology nodes at 5nm or below.

  1. Physical Design Expertise: Strong experience with floorplanning, placement, CTS, routing, IR drop mitigation, timing closure, and signoff debugging.

  1. Tools and Automation: Hands-on experience with tools such as Synopsys ICC2, RedHawk SC, Cadence Innovus, Voltus, Simens Calibre etc, along with strong scripting skills in Tcl, Python, or Perl.

Preferred Qualifications (Bonus)

  1. High-Speed PHY Implementation: Experience with high-speed PHY such as SerDes, UCIe etc physical design implementation.

  1. Advanced-Node Signoff: Familiarity with EM/IR analysis, power grid optimization, congestion analysis, physical verification, and tapeout signoff in advanced semiconductor process nodes.

  1. High-Frequency Design Exposure: Experience supporting high-frequency datapath or DSP-heavy designs is a plus.

  1. 2.5D or 3D design experience: Experience with TSMC CoWoS or SoIC-X design experience is a strong plus.



What we offer

  • Competitive salary commensurate with experience

  • Comprehensive benefits package including health insurance

  • Professional development opportunities and certification support

  • Access to cutting-edge technology and cloud platforms

  • Collaborative work environment with cross-functional teams

*Lumilens is an equal opportunity employer. All qualified applicants will receive consideration without regard to race, color, religion, gender, identity, orientation, veteran status, disability, or any other legally protected status.

Frequently Asked Questions

Is the salary disclosed for the Sr. Physical Design Engineer position at lumilens?
The salary for this Sr. Physical Design Engineer role at lumilens is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Sr. Physical Design Engineer position at lumilens located?
This Sr. Physical Design Engineer role at lumilens is based in San Jose. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Sr. Physical Design Engineer role at lumilens full-time or part-time?
This is listed as a FullTime position. It is posted as a Sr. Physical Design Engineer role in the Engineering department at lumilens.
Which team or department does the Sr. Physical Design Engineer at lumilens belong to?
This Sr. Physical Design Engineer position is part of the Engineering department at lumilens. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Sr. Physical Design Engineer position at lumilens?
Click the "Apply Now" button on this page. You will be redirected to lumilens's official application portal hosted on ashby where you can submit your application directly.
When was the Sr. Physical Design Engineer job at lumilens posted?
This Sr. Physical Design Engineer position at lumilens was posted on Jul 10, 2026. Apply as soon as possible — early applications are often reviewed first.
Sr. Physical Design Engineer
lumilens
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