Senior Memory Circuit Design Engineer (Project Lead)

cisco· 122 Cisco Systems Taiwan Ltd.
Apply Now ↗
📍 Zhubei, TaiwanFull time

About this role

Meet the Team

The Senior Memory Design Engineer is responsible for designing, developing, managing and testing the memory compiler projects. This role involves collaborating with cross-functional teams to oversee the entire lifecycle of memory circuit projects from conceptualization through prototyping, testing, and production. He/she will lead the project team to ensure designs meet performance, reliability, and quality standards while maintaining detailed documentation of design processes and project progress, coordinating the technical communication with layout team, physical design team, and test team.

Your Impact

  • TCAM and SRAM architectures and circuit implementation on advanced technology nodes for Cisco’s AI-scale switch/router chips
  • Execute memory compiler flows, covering TCAM and custom SRAM design architecture, circuit implementation, layout supervision, compiler automation, characterization, model generation, and database QA
  • Lead the engineer team to define spec, make the project milestone plan, manage the task partition, perform the progress and design review, communicate with layout, CAD, PD teams
  • Conduct spec and schedule feasibility evaluation for customization cases
  • Collaborate with manufacturing, testing, and senior engineering teams to ensure successful product development and integration
  • Maintain comprehensive documentation of design processes, test results, and project schedules
  • Stay updated with the latest technological advancements and trends in memory circuit design
  • Support troubleshooting and resolution of memory-related issues in hardware products

Minimum Qualifications:

  • Master’s degree in Electrical Engineering, Electronics Engineering, or related field.
  • 8 years’ relevant experience and strong knowledge of semiconductor memory technologies and circuit design principles.
  • Experience with CAD tools for circuit design and simulation (e.g., Cadence, Synopsys).
  • Excellent problem-solving skills and attention to details.
  • Ability to work collaboratively in cross-functional teams.
  • Strong documentation and communication skills.

Preferred Qualifications:

  • Experience with low-power and high-speed memory circuit design.
  • Knowledge of memory compiler design and verification methodology.
  • Familiarity with prototype testing methodologies and yield analysis, optimization.

We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Frequently Asked Questions

Is the salary disclosed for the Senior Memory Circuit Design Engineer (Project Lead) position at cisco?
The salary for this Senior Memory Circuit Design Engineer (Project Lead) role at cisco is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Senior Memory Circuit Design Engineer (Project Lead) position at cisco located?
This Senior Memory Circuit Design Engineer (Project Lead) role at cisco is based in Zhubei, Taiwan. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Senior Memory Circuit Design Engineer (Project Lead) role at cisco full-time or part-time?
This is listed as a Full time position. It is posted as a Senior Memory Circuit Design Engineer (Project Lead) role in the 122 Cisco Systems Taiwan Ltd. department at cisco.
Which team or department does the Senior Memory Circuit Design Engineer (Project Lead) at cisco belong to?
This Senior Memory Circuit Design Engineer (Project Lead) position is part of the 122 Cisco Systems Taiwan Ltd. department at cisco. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Senior Memory Circuit Design Engineer (Project Lead) position at cisco?
Click the "Apply Now" button on this page. You will be redirected to cisco's official application portal hosted on workday where you can submit your application directly.
When was the Senior Memory Circuit Design Engineer (Project Lead) job at cisco posted?
This Senior Memory Circuit Design Engineer (Project Lead) position at cisco was posted on Sep 3, 2026. Apply as soon as possible — early applications are often reviewed first.
Senior Memory Circuit Design Engineer (Project Lead)
cisco
Apply for this role ↗

You'll be redirected to cisco's official application page on Workday.