Senior Engineer, Development Product Engineering

Designs, develops, and implements automated test solutions for specific devices from product definition through high-volume production release. Serves as a technical resource collaborating with Design, Product Validation, Systems Engineering, and Manufacturing teams to define test plans, develop ATE (Automated Test Equipment) programs, and design test hardware. Responsibilities focus on ensuring robust test coverage, optimizing test time, and supporting the seamless transition of products to global manufacturing sites

What You Will Do

• Advanced ATE & Test Program Development: Implements multi-site test solutions to maximize throughput. Expertly manages software revisions in C/C++ and ETS code, ensuring code modularity and reuse across product families.

• Test Validation & Advanced Hardware Design: Beyond standard GR&R and Spike Analysis, the E2 engineer performs root-cause analysis on hardware marginalities. They oversee the full validation lifecycle, ensuring that bench-to-ATE correlation meets stringent automotive accuracy requirements.

• Data Analytics & Yield Optimization: Proactively monitors Cpk trends and performs Guardbanding analysis to balance quality and yield. Identifies "outlier" signatures in data to prevent field failures (Part Average Analysis).

• Design for Test (DFT) Familiarity: Reviews and implement specific DFT features (e.g., internal registers, test modes) to reduce test time or improve fault coverage.

• Product Test Capability (PTC) Execution: Leads and documents all required PTC activities and deliverables as defined by Allegro’s governing specifications. Summarizes validation data and presents findings to Core Team members and Business Unit (BU) management for production release approval.

• Global Production Deployment & AMPI Support: Serves as the primary technical point of contact for offshore manufacturing during initial production ramps, resolving complex setup and yield issues independently.

• Technical Documentation & Compliance: Reviews documentation prepared by E1 engineers for accuracy and completeness.

• Core Team Technical Leadership: Coordinates Reliability Stress Testing (HTOL, HAST) hardware generation and manages the Software Origination Form (SOF) process under formal control. Mentors E1 engineers on Allegro’s development processes.

• Global Collaboration & Alignment: Participates in cross-functional "Community of Practice" groups to share best practices and influence the global test technology roadmap.

• Strategic Continuous Improvement: Sets and achieves specific TTR targets (e.g., 10-20% reduction) through innovative software algorithms or hardware parallelization, directly impacting the product's Gross Margin.

Who You Are

• A Bachelor’s Degree or equivalent, coupled with 3-5 years of industry experience.

• A minimum of 5 years of experience in the semiconductor industry.

• Strong knowledge of Project Management, Planning, Product Development, Probe Test, Final Test, and Qualification and Reliability processes