Senior Digital Verification Engineer
boschgroup
Senior Digital Verification Engineer
efficientcomputer· Verification & Emulation
About this role
Efficient Computer is rethinking computing from the ground up to solve one of AI's biggest challenges: energy. Our Fabric architecture delivers a 10–100x improvement in energy efficiency for general-purpose computation, including AI, while supporting familiar programming languages and software frameworks—unlocking new possibilities for autonomous machines, intelligent infrastructure, wearables, and space systems. With our first processor, Electron E1, now shipping in volume and more than $97 million in Series B financing recently announced, we're accelerating customer deployments and scaling our architecture to data center performance. Join us to build the hardware and software that bring intelligence wherever it's needed and help shape the next generation of computing.
We are looking for an experienced Design Verification Engineer to drive the functional verification of complex SoC/IP designs from specification through tapeout on a newly formed verification team. This is a great opportunity to have an influence on our products and processes as we move from the initial stages of product development to market release and scaled volume production. Join our team and help us shape the future of computing at the edge and beyond!
Required Qualifications & Experience
- Education: Bachelor's or Master's/PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience: 10+ years of progressive experience in ASIC/SoC design verification with multiple full cycles of ownership from testbench architecture through tapeout.
- UVM and SystemVerilog: Expertise in UVM-based testbench architecture and constrained-random verification methodology
- C/C++ experience for modelling or verification.
- Coverage Closure: Demonstrated track record of driving functional and code coverage to tapeout sign-off on complex, multi-million-gate SoC/ASIC designs.
- Debug Skills: Proven ability to debug complex simulation failures.
- Scripting & Automation: Proficiency in Python for test automation, log analysis, coverage post-processing, and regression flow development.
- Communication: Ability to clearly communicate verification risk, status and tradeoffs to technical peers and program leadership.
Ways to stand out :
- Experience in Formal verification (JasperGold or similar).
- Experience building or using AI Agentic flows for DV.
- Software/Firmware based testing experience and working with software teams pre-silicon
- Post-silicon experience
- SoC Architecture: Understanding and experience in some of the following areas : processors (ARM, RISC-V), interconnects (AMBA AXI/ACE/CHI), memory controllers, DMA engines, interrupt controllers, and standard peripherals.
- Power aware verification and UPF
We offer a competitive base salary for this role, generally ranging from $160,000 to $245,000, plus a 10% annual bonus, meaningful equity, and comprehensive benefits. Final compensation will depend on experience, level, and location, with flexibility for the right candidate.
Why Join Efficient?
Build what's next. At Efficient, you'll tackle big challenges with room to take ownership and make an impact. We back you with competitive pay, equity, a 401(k) match, company-paid benefits, paid parental leave, and flexibility—plus opportunities to grow your skills and career as we scale.
Frequently Asked Questions
What is the salary for the Senior Digital Verification Engineer role at efficientcomputer?
The listed salary for this Senior Digital Verification Engineer position at efficientcomputer is USD 160K–245K. This is an full-time role.
Where is the Senior Digital Verification Engineer position at efficientcomputer located?
This Senior Digital Verification Engineer role at efficientcomputer is based in San Francisco, Bay Area OR Pittsburgh, PA OR Austin, TX. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Which team or department does the Senior Digital Verification Engineer at efficientcomputer belong to?
This Senior Digital Verification Engineer position is part of the Verification & Emulation department at efficientcomputer. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Senior Digital Verification Engineer position at efficientcomputer?
Click the "Apply Now" button on this page. You will be redirected to efficientcomputer's official application portal hosted on greenhouse where you can submit your application directly.
When was the Senior Digital Verification Engineer job at efficientcomputer posted?
This Senior Digital Verification Engineer position at efficientcomputer was posted on Sep 1, 2026. Apply as soon as possible — early applications are often reviewed first.
Senior Digital Verification Engineer
efficientcomputer · 💰 USD 160K–245K
You'll be redirected to efficientcomputer's official application page on Greenhouse.