Senior Designer

Apply Now ↗
📍 Kochi, India

About this role

Job Summary

Good understanding of ASIC/SoC life cycle 

Experience writing ASIC/SoC testplans 

Experience in writing verification strategy document 

UVM based testbench development: 

Experience in ASIC/SoC Testbench definition 

Experience to Build and maintain reusable block-level and sub-system testbenches using SystemVerilog and the Universal Verification Methodology (UVM)." 

Key Responsibilities

C based TB development: 

Experience in developing TB components for SOC with C, SV 

SV functional coverage, Assertions coding      : 

1.Expertise & hands-on experience in OVM/UVM methodologies using SV 

2.Experience to Write, execute, and debug constrained-random and directed test cases based on defined test plans. 

Test case development, coding, execution, bug analysis         : 

1. Experience in developing TB components, including functional coverage implementation and assertion coding 

2. Experience Set up functional coverage, write system assertions (SVA), and analyze code coverage metrics to identify untested gaps in the design logic. 

3.Debug complex simulation failures using waveform viewer tools to isolate design bugs from testbench issues. 

4. Experince in SOC C based tests coding & debugging" 

Skill Requirements

Gate Level Simulation:  

Experience in Gate level simulation & netlist debugging 

Regressions, coverage analysis           

Exeprince in regression failure analayiss 

Functioncal and Code Coverage closure 

Other Requirements

Core Technical Skills    

Languages: Proficiency in Verilog, SystemVerilog, and core concepts of UVM. 

Digital Logic: Strong foundational knowledge in digital logic design, finite state machines (FSM), FIFO architectures, and clocking concepts.  

EDA Tools: Familiarity with industry-standard simulation and debugging tools (e.g., Synopsys VCS, Siemens QuestaSim, Cadence Xcelium/Verdi).  

Protocols: Basic understanding of standard bus protocols like AMBA (AXI, AHB, APB) or peripheral protocols (SPI, I2C, PCIe).  

Scripting: Basic comfort working in a Linux environment and using scripting languages like Python, Tcl, or Perl for automation. 

 

Frequently Asked Questions

Is the salary disclosed for the Senior Designer position at HCLTech?
The salary for this Senior Designer role at HCLTech is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Senior Designer position at HCLTech located?
This Senior Designer role at HCLTech is based in Kochi, India. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
How do I apply for the Senior Designer position at HCLTech?
Click the "Apply Now" button on this page. You will be redirected to HCLTech's official application portal hosted on successfactors where you can submit your application directly.
When was the Senior Designer job at HCLTech posted?
This Senior Designer position at HCLTech was posted on Aug 20, 2026. Apply as soon as possible — early applications are often reviewed first.
Senior Designer
HCLTech
Apply for this role ↗

You'll be redirected to HCLTech's official application page on successfactors.