Senior Design Verification Engineer

cisco· 605 Cisco Serbia doo Beograd
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📍 Belgrade, SerbiaFull time

About this role

Meet the Team

Join our SiliconOne team in Serbia, specializing in ASIC functional verification for Cisco Silicon One chips—high-performance networking chips utilized by major data centers worldwide. Collaborate with us on functional verification using SystemVerilog/UVM, and take advantage of opportunities to engage in various development stages, from architectural discussions to emulation and simulation support. Collaborate with global teams, design and block owners, chiplet and full-chip owners as well as emulation, compiler, and software development teams. Our team blends experienced and energetic engineers, fostering collaboration and transparency in an environment built on trust.

Your Impact

  • Implementation of DV infrastructure for block, cluster, and TOP-level environments.
  • Maintaining existing DV environments and enhancing them.
  • Ensuring complete verification coverage through implementation and review of code and functional coverage.
  • Working closely with architects and designers to ensure verification completeness.
  • Supporting tests done with emulation.
  • Engage in tasks to prepare for post-silicon-validation.


Minimum Requirements:

  • 5+ years’ experience in digital logic design verification
  • Advanced knowledge of SystemVerilog and UVM
  • Advanced debug skills pre-silicon and in-lab

Preferred Requirements:

  • Scripting abilities
  • System integration knowledge (AMBA, PCIe. SPI, I2C, JTAG, CPU)
  • Basic SW knowledge (chop driver level)
  • Basic design knowledge

Why Cisco? 

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. 

We are Cisco, and our power starts with you. 

Frequently Asked Questions

Is the salary disclosed for the Senior Design Verification Engineer position at cisco?
The salary for this Senior Design Verification Engineer role at cisco is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Senior Design Verification Engineer position at cisco located?
This Senior Design Verification Engineer role at cisco is based in Belgrade, Serbia. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Senior Design Verification Engineer role at cisco full-time or part-time?
This is listed as a Full time position. It is posted as a Senior Design Verification Engineer role in the 605 Cisco Serbia doo Beograd department at cisco.
Which team or department does the Senior Design Verification Engineer at cisco belong to?
This Senior Design Verification Engineer position is part of the 605 Cisco Serbia doo Beograd department at cisco. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Senior Design Verification Engineer position at cisco?
Click the "Apply Now" button on this page. You will be redirected to cisco's official application portal hosted on workday where you can submit your application directly.
When was the Senior Design Verification Engineer job at cisco posted?
This Senior Design Verification Engineer position at cisco was posted on Aug 4, 2026. Apply as soon as possible — early applications are often reviewed first.
Senior Design Verification Engineer
cisco
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