Senior ASIC Verification Engineer - Networking Chip Design

nvidia· CN05 NVIDIA Shanghai WFOE
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📍 China, ShanghaiFull time

About this role

We are now looking for Fullchip Verification Enginneer for the Networking Switch Chip Design Group.

 

As a Engineer at NVIDIA's Networking Chip Design Group, you'll join a group of passionate engineers to deliver the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

 

What you'll be doing:

  • Work in a combined design and verification team specializing in Switch Fullchip works

  • Understand the Switch architecture and build on testplan accordingly

  • Maintain and optimize Fullchip verification enviornment to meet feature requirements efficiently

  • Develop Fullchip test suites, maintain regressions, debug failures and sign-off coverages

What we need to see:

  • Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.

  • 5+ years of experience in DV relevant works

  • A team player with good communication and interpersonal skills.

  • Previous experience in full chip verification enviornment for complex chips – an advantage.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field

Frequently Asked Questions

Is the salary disclosed for the Senior ASIC Verification Engineer - Networking Chip Design position at nvidia?
The salary for this Senior ASIC Verification Engineer - Networking Chip Design role at nvidia is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Senior ASIC Verification Engineer - Networking Chip Design position at nvidia located?
This Senior ASIC Verification Engineer - Networking Chip Design role at nvidia is based in China, Shanghai. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Senior ASIC Verification Engineer - Networking Chip Design role at nvidia full-time or part-time?
This is listed as a Full time position. It is posted as a Senior ASIC Verification Engineer - Networking Chip Design role in the CN05 NVIDIA Shanghai WFOE department at nvidia.
Which team or department does the Senior ASIC Verification Engineer - Networking Chip Design at nvidia belong to?
This Senior ASIC Verification Engineer - Networking Chip Design position is part of the CN05 NVIDIA Shanghai WFOE department at nvidia. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Senior ASIC Verification Engineer - Networking Chip Design position at nvidia?
Click the "Apply Now" button on this page. You will be redirected to nvidia's official application portal hosted on workday where you can submit your application directly.
When was the Senior ASIC Verification Engineer - Networking Chip Design job at nvidia posted?
This Senior ASIC Verification Engineer - Networking Chip Design position at nvidia was posted on Aug 5, 2026. Apply as soon as possible — early applications are often reviewed first.
Senior ASIC Verification Engineer - Networking Chip Design
nvidia
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