Senior AE, SerDes Design IP

cadence· CADENCE US
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📍 SAN JOSEFull time💰 USD 84K–156K

About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence IP team develops industry leading IPs that enable customers in a variety of markets - from the endpoint to

the edge to the cloud. At Cadence we’re helping set the standard on IP products that get integrated in SoCs that power the

world’s Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to grow, no matter

where you are in your career.

We are growing our Serdes Applications team and we are looking for smart, energetic, collaborative and creative people

to help us lead the industry with our IP products. At Cadence, we believe in embracing diverse ideas and striving for

excellence in all that we do. Do you want to make a difference and be challenged? Join the High-Performance Culture at

Cadence.

As a Senior Applications Engineer, you will use your knowledge of different high-speed interface standards such as PCIe,

CXL, Ethernet and USB to provide technical pre-sales support to win design IP business. Showcase the performance of the

IP through demos at industry events. This role offers the benefit of both technical growth and business skill development.

You will be part of the Technical Field Organization helping educate customers and providing solutions to them using our

Serdes IP portfolio. As you grow into more senior roles, you will use your knowledge of different high-speed interface

standards to architect solutions for customers using Cadence IPs. Our serial interface PHY and controller IPs are used in

data centers, mobile devices, automobiles and consumer devices. Cadence offers great benefits and has a friendly hybrid

work policy.

Responsibilities include:

 Technical pre-sales of High-Speed Interface IP, including PCIe, CXL and Ethernet PHY and Controllers

 Present Cadence’s IP portfolio and capabilities to prospective customers

 Work closely with IP Sales staff, marketing and R&D teams to win opportunities

 Provide quick-turn product specific technical support to customers, field teams, architects and designers

 Write application notes and articles for internal and/or external publication

 Travel to customer sites may be required occasionally

Qualifications:

 BS in EE, CE or related equivalent with 2+ years of relevant work experience or MS in EE, CE or equivalent

 Individual leadership and initiative to manage pre-sales accounts

 Excellent presentation skills and verbal/written communication skills is a must

Nice to have:

 Experience on high-speed interface controller and/or PHY design/verification

 Working knowledge of high-speed interface PHY

 Knowledge of one or more high speed interface protocols – PCIe, CXL, UCIe, Ethernet, USB, MIPI, 112G, 56G

 Lab validation or demo setup experience

The annual salary range for California is $84,000 to $156,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Frequently Asked Questions

What is the salary for the Senior AE, SerDes Design IP role at cadence?
The listed salary for this Senior AE, SerDes Design IP position at cadence is USD 84K–156K. This is an Full time role.
Where is the Senior AE, SerDes Design IP position at cadence located?
This Senior AE, SerDes Design IP role at cadence is based in SAN JOSE. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Senior AE, SerDes Design IP role at cadence full-time or part-time?
This is listed as a Full time position. It is posted as a Senior AE, SerDes Design IP role in the CADENCE US department at cadence.
Which team or department does the Senior AE, SerDes Design IP at cadence belong to?
This Senior AE, SerDes Design IP position is part of the CADENCE US department at cadence. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Senior AE, SerDes Design IP position at cadence?
Click the "Apply Now" button on this page. You will be redirected to cadence's official application portal hosted on workday where you can submit your application directly.
When was the Senior AE, SerDes Design IP job at cadence posted?
This Senior AE, SerDes Design IP position at cadence was posted on Sep 17, 2026. Apply as soon as possible — early applications are often reviewed first.
Senior AE, SerDes Design IP
cadence · 💰 USD 84K–156K
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