Principal AE, Serdes Design IP

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📍 SAN JOSEFull time💰 USD 127K–237K

About this role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Title

 Principal Applications Engineer, Serdes Design IP

 

Location: San Jose, CA

 

Job Description

The Cadence IP team develops industry leading IPs that enable customers in a variety of markets - from the endpoint to the edge to the cloud. At Cadence we’re helping set the standard on IP products that get integrated in SoCs that power the world’s Data Centers, Automobiles, Cloud and Wireless Systems. We offer amazing opportunities to grow, no matter where you are in your career.

 

We are growing our Serdes Applications team and we are looking for smart, energetic, collaborative and creative people to help us lead the industry with our IP products. At Cadence, we believe in embracing diverse ideas and striving for excellence in all that we do. Do you want to make a difference and be challenged?  Join the High-Performance Culture at Cadence.

 

As a Principal Applications Engineer, you will use your knowledge of different high-speed interface standards such as PCIe, CXL, Ethernet and USB to architect interface solutions for customers using Cadence Serdes IP and showcase the performance of the IP.  You will also define internal processes and lead initiatives to improve team productivity and grow the IP business. This is a customer facing role that offers the benefit of both technical growth and business skill development. You will be part of the Technical Field Organization helping educate customers and providing solutions to them using our Serdes IP portfolio.  Our serial interface PHY and controller IPs are used in data centers, mobile devices, automobiles and consumer devices.

 

Responsibilities include:

·        Technical presales and configuration of High-Speed Interface IP, including PCIe, CXL and Ethernet PHY and Controllers

·        Present Cadence’s IP portfolio and capabilities to prospective customers

·        Serve as a product expert in digital controller and PHY IPs and protocols

·        Work closely with IP Sales staff, marketing and R&D teams to win opportunities

·        Demonstrating IP Performance at industry events and to prospective customers

·        Provide quick-turn product specific technical support to customers, field teams, architects and designers

·        Write application notes and articles for internal and/or external publication

·        Travel to customer sites may be required occasionally

 

Qualifications:

·        BS in EE, CE or related equivalent with 15+ years of relevant work experience or MS in EE, CE or equivalent with 10+ years of relevant work experience

·       Solid experience in one or more high speed interface protocols – PCIe, CXL, UCIe, Ethernet, USB, MIPI, 224G, 112G

·        Strong knowledge of PHY and/or controllers for one or more high speed interface protocols

·        Individual leadership and initiative to manage pre-sales accounts

·        Excellent presentation skills and verbal/written communication skills is a must

 

 

Nice to have:

·        Lab validation and demo setup skills

·        Experience on high-speed interface controller and/or PHY verification

·        Knowledge of AXI and PIPE interface protocols

·        Working knowledge of high-speed interface PHY

 

The annual salary range for California is $127,400 to $236,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Frequently Asked Questions

What is the salary for the Principal AE, Serdes Design IP role at cadence?
The listed salary for this Principal AE, Serdes Design IP position at cadence is USD 127K–237K. This is an Full time role.
Where is the Principal AE, Serdes Design IP position at cadence located?
This Principal AE, Serdes Design IP role at cadence is based in SAN JOSE. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Principal AE, Serdes Design IP role at cadence full-time or part-time?
This is listed as a Full time position. It is posted as a Principal AE, Serdes Design IP role at cadence.
How do I apply for the Principal AE, Serdes Design IP position at cadence?
Click the "Apply Now" button on this page. You will be redirected to cadence's official application portal hosted on workday where you can submit your application directly.
When was the Principal AE, Serdes Design IP job at cadence posted?
This Principal AE, Serdes Design IP position at cadence was posted on Sep 25, 2026. Apply as soon as possible — early applications are often reviewed first.
Principal AE, Serdes Design IP
cadence · 💰 USD 127K–237K
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