Lead PDN/EMIR Engineer
nxpยท IN61 NXP India Private Limited
About this role
Required Qualifications
- B.Tech/M.Tech in Electronics, Electrical Engineering, VLSI, or related field.
- 8+ years of experience in Physical Design, Power Integrity, or Signoff.
Key Responsibilities
Technical Skills:
- Own full-chip and subsystem-level PDN signoff for complex SoCs.
- Define PDN signoff criteria across project milestones.
- Drive power integrity closure for functional, DFT, LBIST, capture, and stress modes.
- Lead package-aware IR/EM analysis and chip-package co-optimization.
- Define and review power grid architecture, bump planning, power switch strategy, and decap methodology.
- Drive Vmin, peak EM, dynamic IR, and thermal-aware analysis.
Methodology & Innovation
- Develop next-generation PDN signoff methodologies.
- Automate PDN flows using TCL/Python/Shell.
- Improve runtime, capacity, dashboarding, and regression infrastructure.
- Collaborate with EDA vendors (Ansys/Cadence/Synopsys) for feature enhancements and tool debug.
- Establish best practices and reusable signoff frameworks across projects.
Cross-Functional Collaboration
- Work closely with Physical Design teams to drive PDN-aware floorplanning, placement, routing, and ECO solutions.
- Partner with DFT teams to optimize pattern power and capture-mode reliability.
- Collaborate with Package and Thermal teams on package RLC optimization and thermal correlation.
- Support silicon bring-up, debug, and correlation of pre-silicon versus post-silicon measurements.
Project Execution
- Provide technical risk assessment and mitigation plans.
- Drive closure of critical PDN hotspots with minimal PPA impact.
- Present signoff status to management and project stakeholders.
- Ensure on-time delivery for tapeout milestones.
- Lead reviews for high-risk blocks and top-level integrations.
People Leadership
- Mentor engineers and PDN owners across multiple projects.
- Define training content and technical roadmaps for the team.
- Lead technical reviews and establish signoff governance.
- Influence organizational PDN strategy and future technology direction.
#LI-DNI
Frequently Asked Questions
Is the salary disclosed for the Lead PDN/EMIR Engineer position at nxp?
The salary for this Lead PDN/EMIR Engineer role at nxp is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Lead PDN/EMIR Engineer position at nxp located?
This Lead PDN/EMIR Engineer role at nxp is based in Bangalore. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Lead PDN/EMIR Engineer role at nxp full-time or part-time?
This is listed as a Full time position. It is posted as a Lead PDN/EMIR Engineer role in the IN61 NXP India Private Limited department at nxp.
Which team or department does the Lead PDN/EMIR Engineer at nxp belong to?
This Lead PDN/EMIR Engineer position is part of the IN61 NXP India Private Limited department at nxp. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Lead PDN/EMIR Engineer position at nxp?
Click the "Apply Now" button on this page. You will be redirected to nxp's official application portal hosted on workday where you can submit your application directly.
When was the Lead PDN/EMIR Engineer job at nxp posted?
This Lead PDN/EMIR Engineer position at nxp was posted on Sep 24, 2026. Apply as soon as possible โ early applications are often reviewed first.
Lead PDN/EMIR Engineer
nxp
You'll be redirected to nxp's official application page on Workday.