Lead Engineer - Embedded SW Quality Test

gevernova· RE1055 GE Renewable Energy Technologies Private Limited
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📍 2 Locations📍 Hyderabad TS IN 26📍 NoidaFull time
Full timeRE1055 GE Renewable Energy Technologies Private Limited

About this role

Job Description Summary

This position serves as a technical lead within the R&D Validation and Verification (V&V) team, focusing specifically on the digital substation evolution. You will be responsible for defining and executing validation strategies for GridBeats softwares used for configuration of GridBeats product lines, with a specialized focus on IEC 61850 standards (Ed 1/2), Sampled Values (SV), GOOSE, and PTP (IEEE 1588). The ideal candidate will architect complex test automation frameworks for IEC 61850-based systems and lead validation of it, ensuring the interoperability and reliability of next-generation digital substation solutions.

Job Description

Essential Responsibilities 

  • Strategy Ownership: Define and own the V&V strategy for IEC 61850 protocol stacks, Sampled Values integration, and digital substation communication features within the Gridbeats ICT/SCT & APS product lines. 
  • Architectural Leadership: Design and deploy scalable, high-efficiency Test Automation Frameworks to validate SCL configurations, MMS/GOOSE/SV messaging, and perform network stress/latency testing. 
  • Protocol Expertise:  Serve as the primary technical authority for IEC 61850 (Ed 1/2) implementation. Lead the validation of the full communication stack, ensuring strict adherence to MMS, GOOSE, and Sampled Values (SV) messaging requirements 
  • Execution & CI/CD Excellence: Lead project estimation, planning, and execution for NPI and LCS projects. Integrate automated test suites into CI/CD pipelines (e.g., Jenkins/GitLab) to enable continuous, shift-left validation. 
  • Advanced Tooling & HIL: Lead the development of custom automation tools (Playwright, Cyprus, or custom Python-based suites) and utilize Hardware-in-the-Loop (HIL) simulation platforms (e.g., RTDS, OPAL-RT) to verify protection relay behaviour under transient and steady-state conditions. 
  • Cross-Functional Collaboration: Partner with global systems engineering teams to translate complex substation requirements into robust, automated, and secure validation suites 

Qualifications / Requirements 

  • Education: Bachelor’s or Master’s Degree in Electrical/Electronics, Power Systems, or Computer Science. 
  • Domain Expertise: Minimum 5+ years of experience in embedded software testing with deep expertise in IEC 61850 (Data models, SCL/CID files, GOOSE, SV, MMS) and IEEE 1588/PTP synchronization. 
  • Modern Engineering Proficiency: Experience with CI/CD integration for automated regression testing and exposure to cybersecurity standards (IEC 62443) in mission-critical environments. 
  • Substation & HIL Knowledge: Strong understanding of power system protection, SCADA architectures, and experience with real-time power system simulators for HIL testing. 
  • Platform Familiarity: Proven experience with GE Vernova Grid Automation products or comparable advanced protection relay platforms and their associated configuration software.  
  • Testing of configuration Tools: Proven experience with IEC-61850 configuration tools like IED & System configuration tools 
  • Automation Proficiency: Proven ability to design/deploy automation frameworks using tools like Playwright, Cyprus, or custom Python-based suites for protocol testing. It will be added advantage. 
  • Testing Rigor: 
  • Digital Process Bus Validation: Extensive experience validating protection relay performance in a digital process bus architecture, replacing conventional copper wiring with SV (IEC 61850-9-2) and GOOSE-based tripping schemes. 
  • Fault Simulation & Injection: Proven ability to execute complex utility fault scenarios (e.g., evolving faults, high-impedance faults, power swings) using secondary injection kits (e.g., Omicron, Megger) integrated with real-time digital simulators. 
  • Message Integrity & Latency Testing: Rigorous verification of protection function response times (e.g., differential, distance, and overcurrent) under varying network conditions, specifically measuring the impact of network congestion on GOOSE message delivery and SV stream stability. 
  • Interoperability Testing (IOP): Proficiency in setting up "system-level" test environments to verify the seamless exchange of data between IEDs, Merging Units, and station controllers from different manufacturers. 
  • Compliance & Certification: Experience preparing for and executing formal Type Testing and IEC 61850 Conformance Testing, ensuring that all protection algorithms meet defined accuracy and speed requirements under both static and dynamic network environments. 

 

Desired Characteristics 

  • Thought Leadership: Ability to synthesize complex communication standards into actionable test cases and mentor junior engineers within a matrixed R&D environment. 
  • Analytical Problem Solving: Superior troubleshooting capabilities for complex embedded software, specifically concerning network latency, packet loss, and protocol stack compliance 
  • Communication: Exceptional ability to present technical roadmaps and validation outcomes to both cross-functional teams and stakeholders. 
  • Agility & Quality: A proven track record of driving complex projects to on-time completion while maintaining high standards for software quality, reliability, and security. 

Additional Information

Relocation Assistance Provided: Yes

Frequently Asked Questions

Is the salary disclosed for the Lead Engineer - Embedded SW Quality Test position at gevernova?
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Where is the Lead Engineer - Embedded SW Quality Test position at gevernova located?
This Lead Engineer - Embedded SW Quality Test role at gevernova is based in 2 Locations, Hyderabad TS IN 26, Noida. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Lead Engineer - Embedded SW Quality Test role at gevernova full-time or part-time?
This is listed as a Full time position. It is posted as a Lead Engineer - Embedded SW Quality Test role in the RE1055 GE Renewable Energy Technologies Private Limited department at gevernova.
Which team or department does the Lead Engineer - Embedded SW Quality Test at gevernova belong to?
This Lead Engineer - Embedded SW Quality Test position is part of the RE1055 GE Renewable Energy Technologies Private Limited department at gevernova. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Lead Engineer - Embedded SW Quality Test position at gevernova?
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When was the Lead Engineer - Embedded SW Quality Test job at gevernova posted?
This Lead Engineer - Embedded SW Quality Test position at gevernova was posted on Aug 11, 2026. Apply as soon as possible — early applications are often reviewed first.
Lead Engineer - Embedded SW Quality Test
gevernova
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