FPGA IP Design and Verification Engineer

altera· 844 Altera Semiconductor Technology India Pvt. Ltd.
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📍 Regus, MadhapurFull time

About this role

Job Details:

Job Description:

Performs functional logic verification of an FPGA to ensure design will meet specification requirements. Develops FPGA verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the FPGA design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with FPGA architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features. May also collaborate with systems and software engineers to support integration testing of the FPGA. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Documents, reviews, and executes the verification strategy plan on different methodologies/techniques (e.g., gate-level-simulation strategy, power patterns/aware simulations) used to enable feature coverage as per the microarchitecture specifications.

Qualifications:

  • 7+ years of experience in Semiconductor IP Design verification.

  • Familiarity with HDL languages (VHDL, Verilog, SystemVerilog). 

  • Experience or knowledge in scripting languages such as Tcl, Perl, or Python. 

  • Prior experience or exposure to FPGA tools (Quartus or Vivado) would be advantageous. 

  • Strong willingness to learn new skills and technologies. 

  • Ability to work collaboratively within a team environment. 

  • Good communication skills and ability to clearly present project details and outcomes. 

Job Type:

Regular

Shift:

Shift 1 (India)

Primary Location:

Regus, Madhapur

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Frequently Asked Questions

Is the salary disclosed for the FPGA IP Design and Verification Engineer position at altera?
The salary for this FPGA IP Design and Verification Engineer role at altera is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the FPGA IP Design and Verification Engineer position at altera located?
This FPGA IP Design and Verification Engineer role at altera is based in Regus, Madhapur. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the FPGA IP Design and Verification Engineer role at altera full-time or part-time?
This is listed as a Full time position. It is posted as a FPGA IP Design and Verification Engineer role in the 844 Altera Semiconductor Technology India Pvt. Ltd. department at altera.
Which team or department does the FPGA IP Design and Verification Engineer at altera belong to?
This FPGA IP Design and Verification Engineer position is part of the 844 Altera Semiconductor Technology India Pvt. Ltd. department at altera. See the full job description for more information about the team structure and responsibilities.
How do I apply for the FPGA IP Design and Verification Engineer position at altera?
Click the "Apply Now" button on this page. You will be redirected to altera's official application portal hosted on workday where you can submit your application directly.
When was the FPGA IP Design and Verification Engineer job at altera posted?
This FPGA IP Design and Verification Engineer position at altera was posted on Sep 21, 2026. Apply as soon as possible — early applications are often reviewed first.
FPGA IP Design and Verification Engineer
altera
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