Director Engineering Operations

asteralabs· Engineering Operations CCE1
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📍 Taipei, Taiwan

About this role

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Location: Taipei / Hsinchu Taiwan

Job Description: 

As an Astera Labs Product and Test Engineer, you will support the new product introductions and existing products already in HVM (high volume manufacturing) at our Asia OSAT partners. Being an expert at running standards based qualification, developing ATE program test coverage, running ATE characterization, using statistical analysis for limit setting and releasing devices into production are part of the skillsets needed. The ideal candidate will also need to support devices released into production by maintaining smooth manufacturing flow and examining product yields (both wafer sort and final test) to ensure on-time customer shipments. The ideal candidate also possesses breadth of industry experience in high-speed product development in the field of product and test engineering, can apply fundamentals in circuit, ATE, and test program development to aid problem solving, and is a self-driven, result focused go-getter in the pursuit of goals and objectives.  

 Basic qualifications: 

  • Minimum of 8-10 years of experience in the field of post silicon product development dealing with high-speed XCVR (product, test or validation). 
  • Experience in working with PCIe Gen4 and above. 
  • Managing a product and test team with the focus on delivering consistent results. 
  • Experience defining and running standards based qualification (both product and package) 
  • Strong academic/technical background in electrical or computer engineering; Bachelor’s is required; MS preferred. 
  • Strong problem-solving skills that involve system level analysis with test hardware, test program and DUT.  
  • Digital and analog circuit level understanding for DUT.  
  • Excellent team player with great communication skills. 
  • Professional attitude with the ability to prioritize a dynamic list of multiple tasks. 

Required experience: 

  • Managing and building a strong team of product and test engineers that will compliment the existing US based product and test engineers 
  • Proven track record continuing seamless production of semiconductor products partnering with OSATs supporting high volume manufacturing through the complete product lifecycle 
  • Hands on experience with using the Advantest 93k ATE platform with specific skills developing and revising ATE test programs for wafer sort and final test solutions 
  • Hands-on knowledge of NRZ/PAM4 SerDes protocols like PCIe (Gen4 and above), Ethernet (25G and above), etc. and/or memory interfaces such as (LP)DDR5/4. 
  • Detailed mindset monitoring device ATE test yields, ATE test time, device quality and rolling out new ATE test programs using consistent BKMs 
  • Strong data analysis skills using tools such as JMP or Spotfire calculating limits and drawing conclusions 
  • Energetic work mindset meeting the demands of shipping quality parts to Astera Labs’ customers through the manufacturing stage of development 

Preferred experience: 

  • Working with silicon validation teams to ensure device performance meets production requirements. 
  • Firmware development in C/C++, scripting in Python, or other equivalent programming experience. 
  • Hands on experience in product/package qualification 

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.

Frequently Asked Questions

Is the salary disclosed for the Director Engineering Operations position at asteralabs?
The salary for this Director Engineering Operations role at asteralabs is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Director Engineering Operations position at asteralabs located?
This Director Engineering Operations role at asteralabs is based in Taipei, Taiwan. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Which team or department does the Director Engineering Operations at asteralabs belong to?
This Director Engineering Operations position is part of the Engineering Operations CCE1 department at asteralabs. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Director Engineering Operations position at asteralabs?
Click the "Apply Now" button on this page. You will be redirected to asteralabs's official application portal hosted on greenhouse where you can submit your application directly.
When was the Director Engineering Operations job at asteralabs posted?
This Director Engineering Operations position at asteralabs was posted on Jul 21, 2026. Apply as soon as possible — early applications are often reviewed first.
Director Engineering Operations
asteralabs
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