Design Verification Engineer

broadcom· 8413 LSI Corporation
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📍 USA-CA San Jose Innovation DriveFull time💰 USD 144K–230K

About this role

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Job Description:

The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.

The engineer will be responsible for a variety of advanced verification tasks such as: verification environment development using modern verification techniques (System Verilog and UVM); designing verification components such as UVM agents, and behavioral models; implementing coverage and assertions using System Verilog; and developing random and directed test cases against the specification. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing coverage results. Candidate must be a highly productive individual contributor with a demonstrated technical capability in system and sub-block level verification.

Job Requirements:

  • A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent

  • 12+ year’s relevant industry work experience.

  • Experience in verifying designs at system level and block level.

  • Fluent knowledge of RTL verification methodologies including System Verilog.

  • Strong experience in ASIC design verification flows and DV methodologies

  • Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

  • Strong and independent design debugging capability.

  • Strong verbal and written communication skills. Must be comfortable working in a team environment with verification team and design team members.

  • Demonstrated ability to analyze and resolve complex verification trade-off scenarios.

  • Must have legal authorization to work in the US

The candidate should have expertise in some (or preferably all) of the following areas:

  • Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.

  • Experience working with Emulators and FPGA based prototyping is a plus.

  • Familiarity with overall chip design methodologies and tools

  • Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred

Additional Job Description:

Compensation and Benefits

The annual base salary range for this position is $143,800 - $230,000. 

 

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Frequently Asked Questions

What is the salary for the Design Verification Engineer role at broadcom?
The listed salary for this Design Verification Engineer position at broadcom is USD 144K–230K. This is an Full time role.
Where is the Design Verification Engineer position at broadcom located?
This Design Verification Engineer role at broadcom is based in USA-CA San Jose Innovation Drive. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Design Verification Engineer role at broadcom full-time or part-time?
This is listed as a Full time position. It is posted as a Design Verification Engineer role in the 8413 LSI Corporation department at broadcom.
Which team or department does the Design Verification Engineer at broadcom belong to?
This Design Verification Engineer position is part of the 8413 LSI Corporation department at broadcom. See the full job description for more information about the team structure and responsibilities.
How do I apply for the Design Verification Engineer position at broadcom?
Click the "Apply Now" button on this page. You will be redirected to broadcom's official application portal hosted on workday where you can submit your application directly.
When was the Design Verification Engineer job at broadcom posted?
This Design Verification Engineer position at broadcom was posted on Jun 19, 2026. Apply as soon as possible — early applications are often reviewed first.
Design Verification Engineer
broadcom · 💰 USD 144K–230K
Apply for this role ↗

You'll be redirected to broadcom's official application page on Workday.