📍 Bangalore, India

About this role

Job Summary

Sub-system level: Hands-on experience to do scan insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.
"Sub-system level: Hands-on Experience to do MBIST Insertion, Verification, Pattern generation. Thorough with Diagnostics and Repairability concepts.
Good to have functional & integration knowledge of TAP controllers and JTAG. Working knowledge of JTAG, iJTAG, ICL, PDL etc."
"DFX and DFD feature insertion and verification at SS level. SOC level verification for the same.
QC checks post RTL insertion, SpyGlass, CDC, RDC, VCLP etc."
Capable of doing SOC level verification, Pattern sim and delivery. 
Should be able to handle cluster team of 2-3 members.
Must be aware of interface to ATEs, tester hand-off languages/TDL/Verilog and must know to drive/modify test procedures. Desirable to have experience in Post Silicon Debug on Tester.
Good at Communication. Compatible of working Remotely / Hybrid method with multiple sites.

Key Responsibilities

Sub-system level: Hands-on experience to do scan insertion, ATPG coverage improvement, Pattern Generation/Simulation. Should have expertise on Simulation debug No-timing/Timing.
"Sub-system level: Hands-on Experience to do MBIST Insertion, Verification, Pattern generation. Thorough with Diagnostics and Repairability concepts.
Good to have functional & integration knowledge of TAP controllers and JTAG. Working knowledge of JTAG, iJTAG, ICL, PDL etc."
"DFX and DFD feature insertion and verification at SS level. SOC level verification for the same.
QC checks post RTL insertion, SpyGlass, CDC, RDC, VCLP etc."
Capable of doing SOC level verification, Pattern sim and delivery. 
Should be able to handle cluster team of 2-3 members.
Must be aware of interface to ATEs, tester hand-off languages/TDL/Verilog and must know to drive/modify test procedures. Desirable to have experience in Post Silicon Debug on Tester.
Good at Communication. Compatible of working Remotely / Hybrid method with multiple sites.

Skill Requirements

Other Requirements

Frequently Asked Questions

Is the salary disclosed for the Design Lead position at HCLTech?
The salary for this Design Lead role at HCLTech is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Design Lead position at HCLTech located?
This Design Lead role at HCLTech is based in Bangalore, India. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
How do I apply for the Design Lead position at HCLTech?
Click the "Apply Now" button on this page. You will be redirected to HCLTech's official application portal hosted on successfactors where you can submit your application directly.
When was the Design Lead job at HCLTech posted?
This Design Lead position at HCLTech was posted on Sep 30, 2026. Apply as soon as possible — early applications are often reviewed first.
Design Lead
HCLTech
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