Design Engineer II
cadence
Design Engineer II
About this role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This person will work with the existing functional verification environment to add new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions, supporting customers in case of any issues with using the verification environment, and functional and code coverage. Additionally, this person will be responsible for ensuring that the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics.
The position is based in Austin.
Position Requirements:
- BS/MS - Electrical / Computer Engineering
- At least 2-3 years of relevant experience including design verification experience.
- Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
- UVM based functional verification environment development is required.
- AXI and/or CHI-E, DDR Memory experience is highly desirable.
Memory controller verification experience is desirable.
As a Verification Engineer for Memory Controller development team, you will lead the verification effort and contribute to the functional verification of the Cadence's Memory Controller IP. This person will work with the existing functional verification environment to add new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions, supporting customers in case of any issues with using the verification environment, and functional and code coverage. Additionally, this person will be responsible for ensuring that the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics.
The position is based in Austin.
Position Requirements:
- BS/MS - Electrical / Computer Engineering
- At least 2-3 years of relevant experience including design verification experience.
- Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
- UVM based functional verification environment development is required.
- AXI and/or CHI-E experience is highly desirable.
Memory controller verification experience is desirable.
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Frequently Asked Questions
Is the salary disclosed for the Design Engineer II position at cadence?
The salary for this Design Engineer II role at cadence is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the Design Engineer II position at cadence located?
This Design Engineer II role at cadence is based in AUSTIN. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the Design Engineer II role at cadence full-time or part-time?
This is listed as a Full time position. It is posted as a Design Engineer II role at cadence.
How do I apply for the Design Engineer II position at cadence?
Click the "Apply Now" button on this page. You will be redirected to cadence's official application portal hosted on workday where you can submit your application directly.
When was the Design Engineer II job at cadence posted?
This Design Engineer II position at cadence was posted on Sep 26, 2026. Apply as soon as possible — early applications are often reviewed first.
Design Engineer II
cadence
You'll be redirected to cadence's official application page on Workday.