ASIC/FPGA Design Engineer 1A

ciena· Ciena India Private Limited
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📍 GurugramFull time
Full timeCiena India Private Limited

About this role

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Ciena develops networking technologies that help deliver secure and scalable connectivity. This role contributes to FPGA and digital logic development for Ethernet, optical, and processor peripheral applications through design, verification, simulation, and laboratory validation activities.

How you will make an impact:

  • Design FPGA digital logic for new features and incremental enhancements within existing IP or FPGA blocks.
  • Perform block-level verification and simulations for FPGA designs.
  • Utilize AMD Vivado or Altera Quartus tools during FPGA development activities.
  • Validate implemented logic in laboratory environments.
  • Qualify FPGA functionality across thermal operating environments.
  • Develop digital logic using Verilog and SystemVerilog.
  • Apply TCL scripts or PERL scripts within development workflows.

The must haves:

  • Application of digital logic design concepts.
  • Utilization of Verilog/SystemVerilog for basic logic design.
  • Utilization of AMD Vivado or Altera Quartus FPGA development tools.
  • Application of block-level verification and simulation techniques.
  • Utilization of TCL scripts or PERL scripts.
  • Ability to work collaboratively within a team environment.
  • Ability to learn and apply new concepts to FPGA designs in Ethernet, optical, and processor peripheral logic domains.

Nice to haves:

  • Knowledge of writing timing constraints.
  • Knowledge of timing closure.

#LI-MP2


At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard.  Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

Frequently Asked Questions

Is the salary disclosed for the ASIC/FPGA Design Engineer 1A position at ciena?
The salary for this ASIC/FPGA Design Engineer 1A role at ciena is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the ASIC/FPGA Design Engineer 1A position at ciena located?
This ASIC/FPGA Design Engineer 1A role at ciena is based in Gurugram. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the ASIC/FPGA Design Engineer 1A role at ciena full-time or part-time?
This is listed as a Full time position. It is posted as a ASIC/FPGA Design Engineer 1A role in the Ciena India Private Limited department at ciena.
Which team or department does the ASIC/FPGA Design Engineer 1A at ciena belong to?
This ASIC/FPGA Design Engineer 1A position is part of the Ciena India Private Limited department at ciena. See the full job description for more information about the team structure and responsibilities.
How do I apply for the ASIC/FPGA Design Engineer 1A position at ciena?
Click the "Apply Now" button on this page. You will be redirected to ciena's official application portal hosted on workday where you can submit your application directly.
When was the ASIC/FPGA Design Engineer 1A job at ciena posted?
This ASIC/FPGA Design Engineer 1A position at ciena was posted on Aug 11, 2026. Apply as soon as possible — early applications are often reviewed first.
ASIC/FPGA Design Engineer 1A
ciena
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