ASIC Engineering Intern, Networking Chip Design - 2027

nvidia· CN05 NVIDIA Shanghai WFOE
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📍 China, ShanghaiFull time

About this role

We are now looking for Chip Design Internships for the Switch Silicon group. As a Chip Design Intern at NVIDIA's Networking business unit, you'll join a group of passionate engineers to implement the next generation state of the art Switch Silicon chips. In this intern position, you'll be part of a dynamic, technology-focused company while closely engaged with developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!  

What you'll be doing:  

  • Understand the fullchip working flow and build infrastructure for better automation, efficiency. 

  • Work in a combined design and verification team and develops test facilities for quality assurance. 

  • Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.  

What we need to see:  

  • Pursuing BS / MS in electrical / computer engineering and related.  

  • A team player with quick learning, good communication and interpersonal skills.

  • Fluent English (both written and spoken). 

  • Experience in RTL design or RTL verification is a plus. 

  • Strong scripting skills, Python/Perl is a plus. 

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear from you. Come, join our Switch Silicon design team and help us build the next chip in this exciting and quickly growing field.

Frequently Asked Questions

Is the salary disclosed for the ASIC Engineering Intern, Networking Chip Design - 2027 position at nvidia?
The salary for this ASIC Engineering Intern, Networking Chip Design - 2027 role at nvidia is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the ASIC Engineering Intern, Networking Chip Design - 2027 position at nvidia located?
This ASIC Engineering Intern, Networking Chip Design - 2027 role at nvidia is based in China, Shanghai. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the ASIC Engineering Intern, Networking Chip Design - 2027 role at nvidia full-time or part-time?
This is listed as a Full time position. It is posted as a ASIC Engineering Intern, Networking Chip Design - 2027 role in the CN05 NVIDIA Shanghai WFOE department at nvidia.
Which team or department does the ASIC Engineering Intern, Networking Chip Design - 2027 at nvidia belong to?
This ASIC Engineering Intern, Networking Chip Design - 2027 position is part of the CN05 NVIDIA Shanghai WFOE department at nvidia. See the full job description for more information about the team structure and responsibilities.
How do I apply for the ASIC Engineering Intern, Networking Chip Design - 2027 position at nvidia?
Click the "Apply Now" button on this page. You will be redirected to nvidia's official application portal hosted on workday where you can submit your application directly.
When was the ASIC Engineering Intern, Networking Chip Design - 2027 job at nvidia posted?
This ASIC Engineering Intern, Networking Chip Design - 2027 position at nvidia was posted on Aug 25, 2026. Apply as soon as possible — early applications are often reviewed first.
ASIC Engineering Intern, Networking Chip Design - 2027
nvidia
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