ASIC Design and Verification Intern, SOC - 2027

nvidia· CN05 NVIDIA Shanghai WFOE
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📍 China, ShanghaiFull time

About this role

The NVIDIA SOC group is looking for ASIC Design and Verification Interns to join the SysASIC and Clock teams. In this position, you will participate in the design and verification of complex reset/fuse/ism/sysctrl/boot and clock-related logic for latest NVIDIA products. You will work closely with global teams across Architecture, ASIC Design, Verification, DFT, Physical Design, Firmware, and Software.

What You’ll Be Doing:

  • Participate in RTL design and verification of SysASIC and clock-related IPs

  • Develop and debug Verilog/SystemVerilog RTL, testbenches, assertions, and simulation regressions.

  • Analyze and resolve issues from simulation, formal verification, lint, CDC/RDC, synthesis, STA, and gate-level verification.

  • Collaborate with cross-functional teams to improve design quality, verification coverage, and development efficiency.

  • Develop scripts, automation tools and AI agent to improve design and verification flows.

What We Need to See:

  • Pursuing a BS/MS degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.

  • Understanding of digital logic design and front-end ASIC development flow, including RTL design, simulation, synthesis, STA, lint, and CDC/RDC.

  • Familiarity with clocking concepts, such as clock gating, clock-domain crossing, reset synchronization, PLLs, and timing fundamentals.

  • Proficiency in Verilog and/or SystemVerilog; knowledge of UVM, SVA, or functional coverage is a plus.

  • Familiarity with formal verification concepts and tools, including property specification, assertion-based verification (SVA), equivalence checking, or formal property verification

  • Experience with Python, Perl, Tcl, shell scripting, C, or C++ is preferred.

  • Familiarity with Linux development environments and common EDA tools.

  • Strong analytical and debugging skills, attention to detail, and willingness to learn.

  • Good English communication skills and the ability to work effectively in a global team.

Ways to Stand Out from the Crowd:

  • Experience through coursework, projects, or internships in RTL design, ASIC verification, Formal Verification, SOC integration, clocking, low-power design, or FPGA development.

  • Hands-on experience with UVM, assertions, functional coverage, CDC/RDC verification, STA, or gate-level simulation.

  • Experience developing automation tools or applying AI-assisted methods to design and verification workflows.

Frequently Asked Questions

Is the salary disclosed for the ASIC Design and Verification Intern, SOC - 2027 position at nvidia?
The salary for this ASIC Design and Verification Intern, SOC - 2027 role at nvidia is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the ASIC Design and Verification Intern, SOC - 2027 position at nvidia located?
This ASIC Design and Verification Intern, SOC - 2027 role at nvidia is based in China, Shanghai. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
Is the ASIC Design and Verification Intern, SOC - 2027 role at nvidia full-time or part-time?
This is listed as a Full time position. It is posted as a ASIC Design and Verification Intern, SOC - 2027 role in the CN05 NVIDIA Shanghai WFOE department at nvidia.
Which team or department does the ASIC Design and Verification Intern, SOC - 2027 at nvidia belong to?
This ASIC Design and Verification Intern, SOC - 2027 position is part of the CN05 NVIDIA Shanghai WFOE department at nvidia. See the full job description for more information about the team structure and responsibilities.
How do I apply for the ASIC Design and Verification Intern, SOC - 2027 position at nvidia?
Click the "Apply Now" button on this page. You will be redirected to nvidia's official application portal hosted on workday where you can submit your application directly.
When was the ASIC Design and Verification Intern, SOC - 2027 job at nvidia posted?
This ASIC Design and Verification Intern, SOC - 2027 position at nvidia was posted on Sep 4, 2026. Apply as soon as possible — early applications are often reviewed first.
ASIC Design and Verification Intern, SOC - 2027
nvidia
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