AI Solution Architect II

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๐Ÿ“ New York, United States

About this role

Job Summary

This role focuses on supporting and enhancing standard cell circuit design activities within the semiconductor development process. The individual is responsible for maintaining, troubleshooting, and improving existing circuit features and delivering quality solutions for assigned tasks. They contribute to technical documentation and assist in gathering requirements, ensuring timely and accurate outputs in line with project objectives.

Key Responsibilities

1. Maintain and update standard cell libraries using EDA tools such as Cadence Virtuoso, ensuring compliance with process technology specifications and resolving functionality issues.
2. Troubleshoot and debug circuit-level challenges in STD-cell designs using simulation tools like Spectre and HSPICE, supporting enhancement and bug-fix requests.
3. Support enhancement and minor feature development by implementing design modifications through schematic and layout editing in accordance with client or team requirements.
4. Participate in peer code and schematic reviews, providing technical inputs based on foundational knowledge of CMOS circuit design and design-for-manufacturability.
5. Prepare and update technical documentation, including design specifications and test reports, to facilitate CMMi compliance and meet client deliverable standards.
6. Collaborate within the design team to collect requirements and clarify technical queries related to standard cell development and validation.

Skill Requirements

1. Strong understanding of STD-Cell circuit design fundamentals, including CMOS logic gates and standard cell architectures.
2. Experience with EDA tools such as Cadence Virtuoso, Spectre, and HSPICE for schematic capture, simulation, and layout editing.
3. Good familiarity with semiconductor process technologies and design rules.
4. Ability to prepare technical documentation and specifications for design flows.
5. Experience in troubleshooting circuit performance issues using simulation and debug tools.

Other Requirements

1. Optional but valuable: Cadence Certified Design Engineer (CCDE) or equivalent EDA certification.

Frequently Asked Questions

Is the salary disclosed for the AI Solution Architect II position at HCLTech?
The salary for this AI Solution Architect II role at HCLTech is not publicly listed. Click "Apply Now" to learn more about the compensation package on their official careers page.
Where is the AI Solution Architect II position at HCLTech located?
This AI Solution Architect II role at HCLTech is based in New York, United States. The position is listed as on-site or hybrid. Check the full job description or apply directly to confirm the work arrangement.
How do I apply for the AI Solution Architect II position at HCLTech?
Click the "Apply Now" button on this page. You will be redirected to HCLTech's official application portal hosted on successfactors where you can submit your application directly.
When was the AI Solution Architect II job at HCLTech posted?
This AI Solution Architect II position at HCLTech was posted on Sep 4, 2026. Apply as soon as possible โ€” early applications are often reviewed first.
AI Solution Architect II
HCLTech
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